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Aloha!
As you probably already figured out, my name is Zvonimir Rakamaric.
I grew up and did my undergrad in Croatia.
Currently, I am a Ph.D. student (I completed my M.Sc. degree in August 2006) in the
Department of Computer Science
at the University of British Columbia.
My supervisor is Alan Hu. When I am at
the department, I can usually be found in the
Integrated Systems Design Lab,
which is located in the ICICS/CS room 342.
Research interests
- Effective, automatic techniques for
formal verification
of complex systems and error detection
- Verification of heap-manipulating programs
- Model checking and abstraction techniques
- Static program analysis and abstract interpretation
Recent Blog Entries
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Amir Pnueli dies at 68
11/15/2009 05:27 PM
The New York Times published an article about the recently deceased pioneer of formal verification Dr. Amir Pnueli:
Amir Pnueli, Pioneer of Temporal Logic, Dies at 68
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Passed my PhD thesis proposal defense
11/15/2009 05:34 PM
Today I passed my PhD thesis proposal defense and finally squared that off! I believe I am now a PhD candidate :). I got very useful feedback from my committee members that is definitely going to make my thesis stronger. So a big thanks for that to Alan, Ken, and Mark. Thanks to Eric as well for chairing the defense.
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Visited IST Austria
10/23/2009 02:36 AM
A couple of days ago, I visited the Institute of Science and Technology (IST) Austria in Klosterneuburg near Vienna. IST Austria is a brand new research institution on track to become a world-class research center. I was invited by its president Prof. Tom Henzinger to give a talk about my research on verification of concurrent systems code. I was impressed by smooth organization of my visit, people who work there and their research, as well as institute's surroundings in the Vienna Woods.
Thanks again to everybody at the IST Austria who made my stay a very pleasant one!
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Attending Dagstuhl Seminar
10/13/2009 09:43 AM
I am attending Dagstuhl Seminar titled "Interaction versus Automation: The two Faces of Deduction". I gave a talk there about my work on the verification of concurrent systems code using SMT solvers.
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Visited Intel Strategic CAD Labs in Hillsboro
09/01/2009 02:58 PM
I was invited recently to visit John O'Leary's group at Intel Strategic CAD Labs in Hillsboro, OR, USA. So, last week I visited them for a day. I gave a talk about my work on verification of concurrent systems code. Also, I had interesting in-depth conversations with John, Amit, and Jim about my tool SMACK and my concurrency related research, as well as their software verification work. I am glad there are a few more guys out there working on software verification and checking. They are very interested in using SMACK or parts of it in their own projects, so I am excited about this possible future collaboration.
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