Chao Yan's Homepage

Introduction

I'm now a Ph.D. candidate of Integrated Systems Design Laboratory, Computer Science Department at University of British Columbia. Supervised by Mark Greenstreet.

I received my MS degree (thesis) in Department of Computer Science from University of British Columbia, Canada and BS degree in Department of Computer Science from Peking University, P.R.China. I have worked in SCERI2 of SUN Mircrosystems and Beijing Uni-Genesoft Information Technology Co.,Ltd.

Research

Circuit Design and Verification, Algorithm Design and Optimization, Numerical Computation. I am also instrested in Computer Architecture, Machine Learning and Wireless Network.

I am developing formal methods to verify digital circuits using continous model. My approach is based on reachability analysis where the reachable space is represented by projectagons. I have used this tool to verify a 3D van der pol and a toggle circuit. For details, see my papers of macis (talk), fmcad (talk) and aspdac (talk). Here are two demos(1a 1b and 2).

Long term, I plan to make our methods robust enough that they can be applied to a wide range of circuit design problems, and other area, such as hybrid system.

Courses

Term I (2007-2008)

Term II (2006-2007)

Term I (2006-2007)

Term I (2005-2006)

Term II (2004-2005)

Term I (2004-2005)

Contact


1 MicroProcessor Research & Development Center

2 SUN China Engineering Research Institute

3 For my friends from China, you'd better use my personal email GSig. Emails to my departments' may be filtered.

Last modified: Tues, June 7, 2005, 9:50 am Canada/Pacific
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